[转帖] HALT and Crystal Failures

HALT and Crystal Failures
_David Rahe_

Crystals are an integral component of practically every operational electronic circuit. They are the heartbeat of the product - if the crystal stops, circuit functionality ends.




The technology of crystal packaging has improved over time; however they continue to be sensitive devices with very serious consequences when failures occur. Therefore, it is important to understand how and why they fail, as well as how to prevent common failures. This paper will discuss several experiences of crystal damage as a result of HALT stresses.



Introduction


We will begin with a general discussion of crystal operation, manufacture, and packaging, and then follow with an overview of the HALT process.

Synthetic quartz is composed of Silicon and Oxygen (Silicon Dioxide) and is cultured in autoclaves under high pressure and temperature. Quartz exhibits piezoelectric properties which generate an electrical potential when pressure is applied on the surfaces of the crystal. Conversely, when an electrical potential is applied to the surfaces of a crystal, mechanical deformation or vibration is generated, followed by mechanical resonance. These vibrations occur at a frequency determined by the crystal design and oscillator circuit.

The active component of the quartz resonator is the mechanically vibrating plate cut from monocrystalline quartz crystal with a precise orientation to the crystallographic axes. The resonator is plated with silver or gold electrodes and enclosed into a suitable holder. The plating is on both sides of the crystal and is connected to insulated leads on the crystal package.

The physical dimensions of the element and its orientation to the axes will determine the resonance frequency, its initial accuracy, its electrical properties and the temperature coefficient. Common cut designations include AT, BT, CT, DT, SC, X, Y, and Z. These designations are defined in accordance to the angle at which they were cut from the quartz crystal. The cut angle, design of the resonator, and thickness will determine the frequency and temperature characteristics of the crystal.

The AT-Cut crystals are the most widely used cut, providing a frequency range from 800 kHz up to 300MHz and excellent frequency-temperature characteristics. The frequency of AT-crystals is inversely proportional to the thickness of the vibrator which results in an upper frequency limit of 50MHz for fundamental crystals, 150MHz for third overtone, etc.


SC-cut crystals are useful for high-precision ovenized applications. SC-cut crystals are less sensitive to mechanical and thermal stress and provide lower aging and higher Q compared to the AT-cut.




Crystal and Oscillator Environmental Concerns!(http://www.reliantlabs.com/ima ... e1.jpg)

As mentioned, the cut of the crystal will largely determine the temperature stability. Crystals are prone to drift over wide temperature ranges, and the manufacturer specifies the maximum and minimum temperatures that the crystal device can be exposed to during oscillation. Over this temperature range, all of the specified operating parameters are guaranteed. Crystals are typically low mass devices and frequently absorb the surrounding temperature conditions relatively quickly. Larger mass oven oscillators, especially flask insulated designs, are somewhat immune to thermal shock since the ovens usually have significant thermal mass well insulated from the ambient. Consequently, much of the oscillator circuitry may not see the rapid temperature change or even the temperature extremes if tests are performed too quickly. Thermal shock type tests should include a start-up test to ensure that the oscillator will start at the temperature extremes.

Quartz crystal oscillators change frequency slightly when accelerated. Crystals exhibit acceleration sensitivity and if a designer is careless, so will the circuitry. This sensitivity may be observed in stable oven oscillators by employing the "two-g tip-over" test. When an oscillator is turned upside down, the force on the crystal changes by two g’s (plus-one g to minus-one g). A typical SC-cut 10 MHz crystal will change about 0.02 Hz which gives a sensitivity of about 0.01 Hz per g. Generally, higher frequency crystals will have less g sensitivity but the sensitivity can vary significantly from one to the next crystal and from one crystal holder type to the next. Changing stress on critical components or even slight movement can also shift the frequency, adding to the oscillator's overall sensitivity.

!(http://www.reliantlabs.com/ima ... e2.jpg)


The sensitivity to acceleration means that the random and periodic mechanical vibrations found in many equipment bays (i.e. fans, etc.) and instruments can induce significant phase noise in high-performance crystal oscillators.
Crystal holders, circuit boards, and cases can exhibit mechanical resonance giving the oscillator substantially increased sensitivity at particular frequencies of vibration. Careful design and crystal mount selection can move these resonances to high frequencies where mechanical damping is more effective.
It is worth noting that the vector nature of the acceleration sensitivity means that the oscillator will be most sensitive to vibration in one particular direction and that there is a plane where the sensitivity approaches zero (any direction orthogonal to the sensitivity vector). In critical systems, the oscillator may be positioned so that the sensitivity vector points in the direction of least vibration or in the direction of best isolation when a vibration isolator is used.
The reduction of crystal oscillators' vibration sensitivity is currently receiving the attention of many in the frequency control industry including both crystal and oscillator manufacturers.


HALT Process Overview

The accelerated principles of Highly Accelerated Life Test involve the use of rapid thermal transitioning
(!(http://www.reliantlabs.com/ima ... us.jpg) 30°C/minute) combined with multi-axis (six degree of freedom) repetitive shock vibration performed over a wide frequency bandwidth. In addition to these stresses, product specific stresses such as voltage margining, frequency margining, and power cycling may also be applied. While the stresses are applied the test units should be fully functionally exercised, in order to detect any intermittent failures.

HALT is a process of step stressing products to identify operating and destruct limitations of the product. The process begins with cold and hot temperature step stresses, followed by rapid thermal cycling between the identified thermal limits, vibration step stress, and lastly, a combined environment of vibration step stress with thermal cycling.

In HALT, the goal is to over-stress the product and to very quickly induce failures. By applying these stresses in a controlled, stepped fashion, the testing results in the exposure of the weakest points of the design. At the completion of HALT, the functional and destruct limits of the product are known, and a “laundry list” of design and process limitations is defined, with corrective actions also identified. In short, the goal of HALT is to quickly break the product and learn from the failure modes that are exhibited. The failures provide the designer the information needed to understand the weaknesses within the product and what risk those weaknesses present to the product reliability.

The objective of the HALT processes is not compliance but results, corrective action, and prevention. In HALT there is every intention of doing physical damage to product in an attempt to maximize and quantify the margins of product strength (both operating and destruct) by stimulating above expected end-use environments.

It is important to remember that the HALT will be made more effective if additional stresses can be incorporated. By combining more and more stresses, you will bring out failure modes that may occur in the field only under a unique stress situation. This can eliminate a failure mode that could cause a lot of headaches if you were forced to look for it using traditional methods after the product was released.

At the completion of the step stress testing, you will have found many valuable failure modes for your product and will have a clear understanding of the margins in your product. Not only will you will know what your limits are, but also WHY. This can give you a unique understanding of the weaknesses in your product. In the end, you will have optimized the design of your product so that it will last as long as possible in the field; the failures the result from the accelerated stresses applied during HALT have demonstrated excellent correlation to failures that occur over time at normal use (more benign) environments.

Test Case Results



The results discussed in this paper are based on test data from several product and crystal types. They represent typical ways that crystals fail during or rather as a result of the HALT environmental stresses.
Test Case 1:!(http://www.reliantlabs.com/ima ... e3.jpg)



This crystal failed at 20 Grms, when the lead of the crystal can body was severed at the board fillet. It also sustained internal damage to the quartz crystal lead attachment. This failure repeated on 2 of 3 boards tested. The replacement crystal was rotated 90 degrees and epoxied to the board. It survived without failure to 58 Grms, but did fail at 35 Grms and 100°C during the combined environmental testing.


Test Case 2:


This crystal failed at 35 Grms, when a lead was severed from the crystal can body to the board fillet. The replacement crystal was laid flat and epoxied to the board and survived without failure to 58 Grms.


!(http://www.reliantlabs.com/ima ... e4.jpg)!(http://www.reliantlabs.com/ima ... _2.jpg)



Test Case 3:!(http://www.reliantlabs.com/ima ... e5.jpg)




This crystal failed at 50 Grms and 100°C during the combined environmental testing when a lead was severed from the crystal can body. The crystal was taped to the board before the vibration was applied in an attempt to replicate a double-sided tape mounting method.



Test Case 4:


!(http://www.reliantlabs.com/ima ... e6.jpg)
This crystal failed at 15 Grms when leads were severed. The replacement crystal was epoxied to the board and survived without failure to 60 Grms. Capacitors that were damaged at this stress level are also shown.


Summary
Crystals can present challenges to design engineers. However, new packaging methods and careful circuit layout can help to minimize many issues. Improved package designs, such as surface mount, incorporate lower mass and higher pin count to support the crystal body. This is normally an excellent solution for mechanical vibration related failures. SMT spreads mass over larger base and uses additional leads and improved lead strength. Regardless of the package style used, the body of the crystal should be mounted flush to the board. This will greatly reduce rocking movement (pendulum effect) of the package and thereby lessen the stress on the leads.
Note that there are many other issues not discussed in this paper can lead to frequency drift and crystal failures, including thermal instability from electrolytic capacitor drift, board layout, and package density.



Author Biography
_David Rahe is employed as the Reliability Department Manager at Professional Testing Inc. Prior to joining Professional Testing, he spent over five years with QualMark Corporation as a Managing Engineer for the Denver Lab, and later as Director of Operations, Western Region, where he managed four domestic and ten international labs. He held positions of Engineering Manager and General Manager at an independent test lab in Minneapolis, MN. With twenty years of experience in the environmental test industry, David has performed hundreds of HALTs on a wide variety of products. David is an advisory member of the quality teams of General Motors, Dell, and Andrew Corp. and serves as Chairman of the IEEE TC7 AST (Accelerated Stress Test) Group Standards Committee. You may reach David at drahe#ptitest.com._